ibm360-console blogspot.com

Operation Blinkenlights

Friday, April 13, 2012. Source code of FPGA implementation. Pcie360 0 1 20120413.zip. Contains the VHDL code for the FPGA implementation of the 2065 emulator incomplete, but capable of some elementary operations from the console panel. Heres the description from the top-level file pcie360.vhd. Cpu - actual CPU emulation. Blinken - interface to an IBM 2065 console panel wshift registers. Corememory - 256 KB of main memory dual-ported between cpu and ioce. Links naar dit bericht. The 50-pin ribbon.

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PAGE TITLE

Operation Blinkenlights

DESCRIPTION

Friday, April 13, 2012. Source code of FPGA implementation. Pcie360 0 1 20120413.zip. Contains the VHDL code for the FPGA implementation of the 2065 emulator incomplete, but capable of some elementary operations from the console panel. Heres the description from the top-level file pcie360.vhd. Cpu - actual CPU emulation. Blinken - interface to an IBM 2065 console panel wshift registers. Corememory - 256 KB of main memory dual-ported between cpu and ioce. Links naar dit bericht. The 50-pin ribbon.

CONTENT

This web page ibm360-console.blogspot.com states the following, "Friday, April 13, 2012." We saw that the webpage said " Source code of FPGA implementation." It also said " Contains the VHDL code for the FPGA implementation of the 2065 emulator incomplete, but capable of some elementary operations from the console panel. Heres the description from the top-level file pcie360. Cpu - actual CPU emulation. Blinken - interface to an IBM 2065 console panel wshift registers. Corememory - 256 KB of main memory dual-ported between cpu and ioce."

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